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SDIO 8.0 Verification IP

SDIO 8.0 Verification IP

SDIO 1.0, 2.0,3.0,4.20,5.0,5.10,6.0,6.10,7.0,7.10 and 8.0(Draft) VIP is an advanced solution in the market for the verification of SDIO 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) implementations. It is adherent with SDIO 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) VIP and it supports SPI, SD1, SD4 and MMC8. It can generate all command types. The SDIO VIP monitor acts as powerful protocol-checker, fully compliant with SDIO 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) specification.

SDIO 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) VIP includes an extensive test suite covering most of the possible scenarios and SDIO conformance norms. SDIO 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) VIP can perform all protocol tests as testbench and moreover it allows an easy generation of a very high number of patterns and a set of specified patterns to stress the DUT.

SDIO 8.0 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

SDIO 8.0 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Features
  • SDIO Specification 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) compliant.
  • Supports SDIO, SD Memory, SD Combo card and Multi-media cards.
  • Easily configurable to work as SDIO aware or non-SDIO aware Host controller.
  • Card detection on DAT [3] line in SD mode and CS line in SPI mode.
  • Re-initialization of combo card in either SDIO only mode or SD memory only mode.
  • Command level features such as resetting the card, setting bus width and changing bus mode (SD to SPI).
  • 1-bit, 4-bit, 8-bit SD bus mode and SPI bus mode.
  • Supports read-write, read-only cards.
  • All version 3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) features supported such as speed class, tuning, voltage and block size control.
  • Supports capacity of Memory.
  • Switch function command supports Bus speed mode,command system,drive strength & future function.
  • Set block count(CMD23) command is supported.
  • Supports different memory capacities given below:
    • Standard Capacity SD Memory Card (SDSC) : Up to 2 GB
    • High Capacity SD Memory Card (SDHC) : More than 2GB and up to 32GB
    • Extended Capacity SD Memory Card (SDXC) : More than 32GB and up to 2TB
    • Ultra Capacity SD Memory Card (SDUC) : More than 2TB and up to 128TB
  • All UHS1 modes – SDR50/SDR104/DDR50.
  • Supports e-MMC standard and high capacity standards JESD84-A441, JESD84-B45, JESD84-B50, JESD84-B51 and JESD84-B51A compliant, Supports MMC standard JESD840B42.
  • Supports eMMC 5.2 draft specification.
  • Low speed mode, full speed mode and high speed mode operations.
  • Single byte, single block, multiple block (finite and infinite) transfers, MMC stream transfer operations.
  • Direct command during data transfer (SD mode only).
  • Read wait operation and allows read wait control by stopping clock and by asserting DAT [2] line low.
  • Supports all features of SDIO card type-A specification for bluetooth version 1.00.
  • Supports all features of SDIO card type-B specification for bluetooth version 1.00.
  • Supports all features of SD specification Part1 eSD(Embedded SD) addendum version 2.10
  • Supports all features of write protect feature.
  • Supports application specific commands.
  • Supports card ownership protection.
  • Supports cache operation.
  • Supports command queuing.
  • Supports Card maintenance (background operations).
  • Supports Low voltage 1.8V cards.
  • Supports discard and Full user area logical erase.
  • Asynchronous and synchronous abort mechanism.
  • Supports function extension specification.
  • Supports video speed class specification
  • Suspend/Resume card operation.
  • Lock-unlock and erase operation card features.
  • SD 1-bit , SPI mode interrupt and SD 4-bit mode card interrupts.
  • Clock disable and interrupt wake up card features.
  • Tracking of the transmit and receive counters.
  • Detects and reports the following errors.
    • Out of range error
    • Address misalign error
    • CRC error
    • Switch error
    • Illegal command error
    • Block length error
    • Lock-unlock failed error
    • Erase sequence error
    • Direction bit error
    • Stuff bit error
    • Erase param error
    • Parameter error
    • Reserved bit error
    • Invalid voltage error
    • Function number error
    • CSD/CID overwrite error
    • WP violation error
  • Protocol Checker fully compliant with SDIO Specification 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) compliant.
  • Functional coverage for complete SDIO Specification 1.0/2.0/3.0/4.20/5.0/5.10/6.0/6.10/7.0/7.10/8.0(Draft) compliant.
  • Supports constraints randomization.
  • Callbacks in host, slave and monitor for user processing of data.
  • Complete testsuite to verify each and every feature of SDIO standard.
  • Configurable as agent (frame generator) or monitor.
  • Supports Bus-accurate timing.
  • Status counters for various events on bus.
  • Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations
Benefits
  • Faster testbench development and more complete verification of SDIO designs.
  • Easy to use command interface simplifies testbench control and configuration of slave and host.
  • Simplifies results analysis.
  • Runs in every major simulation environment.
SDIO Verification Env

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    SmartDV's SDIO Verification env contains following.

  • Complete regression suite containing all the SDIO testcases.
  • Examples showing how to connect various components, and usage of Host, Slave and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

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