QI Verification IP provides a smart way to verify the Qi component of a SOC or a ASIC. The SmartDV's Qi Verification IP is fully compliant with standard Qi Specification. The Qi VIP can be readily customized and optimized for a wide range of specific system applications.
QI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
QI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
- Features
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- Compliant with Qi Specification
- Supports negotiation phase, a calibration phase, and a renegotiation phase
- Supports Power Transmitter (PTx)
- Supports Power Receiver (PRx)
- Supports differential bi-phase encoding scheme
- Supports both Baseline power profile and Extended power profile
- Supports Foreign object detection(FOD) extensions
- Supports Frequency shift keying modulation and De-modulation
- Supports Backscatter modulation and De-modulation
- Supports Power transfer phases with Power Transmitter (PTx),Power Receiver (PRx) perspective
- Supports Stand-by mode of operation
- Supports Power Transfer Contract
- Supports Power transmitter and power receiver controls the power transfer in power transfer phase
- Supports Power transfer phases for Baseline power profile and Extended power profile
- Supports violation of the Power Transfer Contract
- Supports Transmission errors
- Supports 11-bit asynchronous serial format to transmit a data byte from power receiver
- Supports all the Power transmitter to power receiver communication packets
- Supports all the Power receiver to power transmitter communication packets
- Supports Acknowledge, Not-Acknowledge and Not-defined response
- Supports Timers as per specification
- Supports all types of error injection and detection
- Supports error injection in all the layers of Qi
- Supports callbacks for various events
- Supports constrained randomization of protocol attributes
- Benefits
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- Rich set of configuration parameters to control the functionality
- Faster testbench development and more complete verification of Qi designs.
- Simplifies results analysis.
- Runs in every major simulation environment.
- Qi Verification Env
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SmartDV's Qi Verification env contains following.
- Complete regression suite containing all the Qi testcases.
- Examples showing how to connect various components, and usage of BFM and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.