The 200GBase-KR8/KR4/KR2 Ethernet Verification IP is compliant with IEEE 802.3bs specifications and verifies MAC-to-PHY layer interfaces of designs with a 200GBase-KR8/KR4/KR2 Ethernet interface. It can work with SystemVerilog, Vera, SystemC, E and Verilog HDL environment. 200GBase-KR8/KR4/KR2 verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethernet product.
    200GBase-KR8/KR4/KR2 Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
    200GBase-KR8/KR4/KR2 Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
  
    
       - Features
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       - Supports 200GBase-KR8/KR4/KR2 interfaces as per the specifications defined in IEEE 802.3bs
- Supports scrambler
- Supports FEC
- Supports CDAUI_16
- Supports CDMII
- Supports backplane auto-negotation
- Supports CDR for serial protocols
- Supports MDIO slave and master model as per Clause 22 and Clause 45
- Supports Glitch insertion and detection
- Supports Pause frame generation and detection.
- Supports all types of 200GBase-KR8/KR4/KR2 TX and RX errors insertion/detection.
      -  Oversize, undersize, inrange, out of range Packet size errors
-  Missing SPD/EPD/SFD framing errors
-  SFD on wrong lane
-  CRC Error
-  Lane skew insertion
-  Invalid /D/ and /K/ character injection
-  Variable preamble and IPG insertion
-  Invalid block code insertion
-  Sync bit corruption
-  FEC error injection
-  Scrambler error injection
 
- Supports the following Upper layer protocols:
      -  IPV4
-  IPV6o TCP
-  UDP
-  ICMP
-  ARP
-  GRE
-  NVGRE
-  VXLAN
-  PPPOE
-  EAPoL
-  FCOE
-  RARP
-  IPsec
-  MACSEC
-  Wake on LAN
-  Slow protocol
 
- Supports IP in IP
- Supports Q in Q
- Comes with 200GBase-KR8/KR4/KR2 Tx BFM, 200GBase-KR8/KR4/KR2 Rx BFM, and 200GBase-KR8/KR4/KR2 PCS Monitor
- Supports MDIO slave and master model as per Clause 22 and Clause 45
- Monitor supports detection of all protocol violations.
- Built in coverage analysis. 
- Callbacks in master and slave for various events
- Status counters for various events in bus
 
- Benefits
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    - Faster testbench development and more complete verification of 200GBase-KR8/KR4/KR2 designs.
- Easy to use command interface simplifies testbench control and configuration of 200GBase-KR8/KR4/KR2 TX and RX.
- Simplifies results analysis.
- Runs in every major simulation environment. 
 
 
- 200GBase-KR8/KR4/KR2 Verification Env
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                                SmartDV's 200GBase-KR8/KR4/KR2 Verification env contains following. 
- Complete regression suite containing all the testcases.
- Examples showing how to connect various components, and usage of TXRX BFM and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.