The SmartDV Verification IP (VIP) for DALI provides an efficient and simple way to verify the DALI protocol bus. The SmartDV's Verification IP for DALI is fully compliant with IEC 62386-101 Edition 2.0 2014-11 and IEC 62386-102 Edition 2.0 2014-11 Specifications and provides the following features.
DALI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
DALI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
- Features
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- Complete DALI Tx/Rx functionality.
- Fully configurable serial interface
- Supports programmable clock frequency of operation.
- Configurable baud rate
- Supports the two types of frame formats.
- 16-Bit Forward Frame
- 20-Bit Reserved Forward Frame
- 24-Bit Forward Frame
- 32-Bit Reserved Forward Frame
- Backward frame
- Supports different Device addressing method
- Short address
- Group address
- Broadcast unaddress
- Broadcast address
- Special command address
- Reserved address
- Supports direct arc power control (DAPC) command
- Supports Manchester Encoding/Decoding technique
- Supports all types of error insertion and detection
- Start bit error
- Stop bit errors
- Response Timeout error
- Manchester Encoding errors
- Bi-phase Encoding errors
- Framing errors
- Glitch insertion and detection
- Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
- Allows creation of both random and directed testcases as well as constraints randomization.
- Status counters for various events on bus.
- Supports callbacks in monitor, receiver and transmitter BFMs for user processing of data.
- DALI Verification IP comes with complete testsuite to test every feature of DALI specification.
- Functional coverage for complete DALI features.
- Benefits
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- Faster testbench development and more complete verification of DALI designs.
- Easy to use command interface simplifies testbench control and configuration of TX and RX.
- Simplifies results analysis.
- Runs in every major simulation environment.
- DALI Verification Env
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SmartDV's DALI Verification env contains following.
- Complete regression suite containing all the DALI testcases.
- Examples showing how to connect various components, and usage of BFM and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation contains User's Guide and Release notes.
