• Home
  • About Us
    • Partners
    • Careers
  • Products
    • Verification IPs
      • MIPI Verification IPs
      • Networking and SOC Verification IPs
      • Automotive And Serial Bus Verification IPs
      • Storage And Video Verification IPs
    • Memory Models
      • DDR SDRAM Memory Models
      • DFI Verification IPs
      • DIMM Memory Models
      • Flash Memory Models
      • Graphics Memory Models
      • High Bandwidth Memory Models
      • Low Power Memory Models
      • Misc Memory Models
      • Non volatile Memory Models
      • SDRAM Memory Models
      • SRAM Memory Models
    • SimXL - Emulation Models
      • MIPI Synthesizable Transactors
      • Networking and SOC Synthesizable Transactors
      • Automotive And Serial Bus Synthesizable Transactors
      • Storage And Video Synthesizable Transactors
      • DDR SDRAM Memory Synthesizable Transactors
      • Low Power Memory Synthesizable Transactors
      • Graphics Memory Synthesizable Transactors
      • Flash Memory Synthesizable Transactors
      • High Bandwidth Memory Synthesizable Transactors
      • SDRAM Memory Synthesizable Transactors
      • SRAM Memory Synthesizable Transactors
      • Non volatile Memory Synthesizable Transactors
      • DIMM Memory Synthesizable Transactors
      • Misc Memory Synthesizable Transactors
      • DFI Synthesizable Transactors
    • Formal Verification IPs (Assertion IP)
      • Networking and SOC Assertion IPs
      • DDR SDRAM Memory Assertion IPs
      • Low Power Memory Assertion IPs
      • Graphics Memory Assertion IPs
      • High Bandwidth Memory Assertion IPs
      • SDRAM Memory Assertion IPs
      • DFI Assertion IPs
      • Serial Assertion IPs
    • Post Silicon Validation IPs
      • MIPI Post Silicon Validation IPs
    • Design IPs
      • DDR Controller Design IPs
      • Ethernet Design IPs
      • Serial Bus Design IPs
      • Audio Video Design IPs
      • MIPI Design IPs
      • Automotive Design IPs
      • Bridge Design IPs
      • DMA Controller Design IPs
      • Flash Controller Design IPs
      • High Speed Design IPs
  • Customers
  • News & Events
  • Support
  • Contact Us
Products

Compact Flash Verification IP

Compact Flash Verification IP

CF Verification IP provides an smart way to verify the Compact Flash operations. The SmartDV's CF Verification IP is fully compliant with revision 1.0/2.0/3.0 and 4.0 of the CF Specification and provides the following features.

Compact Flash Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Compact Flash Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Features
  • Supports Compact Flash Specs 1.0/2.0/3.0 and 4.0.
  • Supports all the 3 basic modes of CF Card,
    • PC Card ATA using I/O Mode.
    • PC Card ATA using Memory Mode.
    • True IDE Mode.
  • Supports all CF-ATA Commands.
  • Supports Security Mode Feature set.
  • Supports Power Down Commands and Sleep mode.
  • Supports Ultra DMA Mode.
  • Supports CF-ATA Registers.
  • Supports for CRC for UDMA Operations.
  • Supports the below timing specifications like,
    • Attribute Memory Read Timing Specification
    • Configuration Register (Attribute Memory) Write Timing Specification
    • Common Memory Read Timing Specification
    • Common Memory Write Timing Specification
    • I/O Input (Read) Timing Specification
    • I/O Output (Write) Timing Specification
    • True IDE PIO Mode Read/Write Timing Specification
    • True IDE Multiword DMA Mode Read/Write Timing Specification
    • Ultra DMA Mode Read/Write Timing Specification
  • Supports Host and Device Initiating, Terminating, Pausing, Sustaining Ultra DMA Mode Data In/Out Burst.
  • Supports Memory Space Decoding.
  • Supports UDMA Functions.
  • Supports Attribute Memory Functions.
  • Supports I/O Transfer Functions.
  • Supports True IDE Mode I/O Transfer Functions.
  • Supports Metaformat functions.
  • Protocol Checker fully compliant with CF Specifications.
  • Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations
  • Built in functional coverage analysis.
  • Supports Callbacks, so that user can access the data observed by monitor.
  • Compact Flash Verification IP comes with complete test suite to test every feature of CF specification.
Benefits
  • Faster testbench development and more complete verification of CF designs.
  • Easy to use command interface simplifies testbench control and configuration of Card and Host.
  • Simplifies results analysis.
  • Runs in every major simulation environment.
CF Verification Env

    Note: Only mails from offical mail ID will be processed

    Request Datasheet
    Request Evaluation

    SmartDV's CF Verification env contains following.

  • Complete regression suite containing all the CF testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

About SmartDV
Partners
Careers
Products
Customers
News & Events

Verification IP
Memory Models
SimXL - Emulation Models
Formal Verification IP (Assertion IP)
Post-Silicon Validation IP
Design IP

info@smart-dv.com

Contact Us
Support
Copyright © SmartDV Technologies India Private Limited All rights reserved.