Single Edge Nibble Transmission (SENT) is a single-wire, serial unidirectional communication protocol. It is intended for use in applications where high resolution sensor data needs to be communicated from a sensor to an Engine Control Unit (EUC). It is intended as a replacement or the lower resolution methods of 10 bit A/D's and as a simpler low cost alternative to CAN or LIN in automotive industry. SENT VIP are reusable components that provide ready made verification environment. Compatible with Single Edge Nibble Transmission (SENT) specifications and supports all the frame types. SAE J2716 includes an extensive test suite covering most of the possible scenarios. It can perform all protocal tests and moreover it allows an easy generation of very high number of patterns and a set of specified patterns to stress the DUT.
- Features
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- Compatible with Single Edge Nibble Transmission (SENT) specification SAE J2716 JAN2010
- Supports SENT/SPC protocol as defined in the MPC5510 Microcontroller family (AN4219)
- Supports all types of frames
- Short Serial Message format
- Enhanced Serial Message format
- Enhanced serial message formats Supports different configurations
- 12-bit data and 8-bit message ID
- 16-bit data and 4-bit message ID
- These SAE J2716 nodes can be configured as Sensor, Active Device or Passive Device nodes
- The DUT can either be a SAE J2716 sensor or device
- Supports programmable clock frequency of operation
- Built-in checkers ensures that SAE J2716 Protocol has been followed correctly
- Supports all types of error insertion and detection
- Checksum error
- Message ID error
- Oversize error
- Sync error
- Supports pause pulse properties
- Minimum length 12 ticks
- Maximum length 768 ticks
- Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations
- Benefits
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- Compatible with testbench writing using SmartDV VIP's
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- SENT (SAE J2716) Synthesizable Transactor Env
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SmartDV's SAE J2716 Synthesizable env contains following:
- Synthesizable transactors
- Complete regression suite containing all the SAE J2716 testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and function's used in verification env
- Documentation contains User's Guide and Release notes
