Parallel NOR Flash Synthesizable Transactor provides a smart way to verify the Parallel NOR Flash component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's Parallel NOR Flash Synthesizable Transactor is fully compliant with standard Parallel NOR Flash Specification and provides the following features.
- Features
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- Supports 100% of Parallel NOR Flash protocol standard
- Supports all the Parallel NOR Flash commands as per the specs
- supports asynchronous random/page read:
- Page size : 16 words or 32 bytes
- Page access : 20ns
- Supports buffer program (512-word program buffer):
- 2.0 MB/s when using full buffer program
- 2.5 MB/s when using accelerated buffer program
- Supports word/byte program
- Supports block erase (128KB)
- Supports the following memory densities:
- 128 MB
- 256 MB
- 512 MB
- 1 GB
- 2 GB
- Supports memory organization:
- Uniform blocks : 128KB or 64KW each
- x8/x16 data bus
- Supports program/erase suspend and resume operation:
- Read from another block during a program suspend operation
- Read or program another block during an erase suspend operation
- Supports blank check operation to verify an erased block
- Supports cyclic redundancy check (CRC) operation
- Supports unlock bypass, block erase, chip erase and write to buffer capability
- Supports all types of timing and protocol violation detection
- Supports extended memory blocks
- Supports security and write protection:
- Nonvolatile protection
- Volatile protection
- Password protection
- Models, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations
- Benefits
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- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- Parallel NOR Flash Synthesizable Transactor Env
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SmartDV's Parallel NOR Flash Synthesizable Transactor env contains following:
- Synthesizable transactors
- Complete regression suite containing all the Parallel NOR Flash testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and function's used in verification env
- Documentation contains User's Guide and Release notes
