MIPI SoundWire Synthesizable Transactor provides a smart way to verify the MIPI SoundWire component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's MIPI SoundWire Synthesizable Transactor is fully compliant with version 1.2r08 MIPI SoundWire Bus Specification and provides the following features.
- Features
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- Supports MIPI SoundWire version 1.2r08 Specifications
- Supports full MIPI SoundWire Master,Slave functionality
- Supports Basic PHY and High PHY mode
- Supports IO timing
- Supports all frame shapes
- Supports static, dynamic and PHY frame synchronization
- Supports handling over bus control to Monitor based on BREQ bit
- Supports BANK handling
- Supports handling of all combinations of ACK/NACK responses
- Supports PING, Read, Write commands
- Supports all registers definitions with proper read/write attributes
- Supports Dual Ranked Register and Commit mechanism
- Supports Multi-byte Quantities buffer
- Supports dynamic shape and payload switching
- Supports groups and group response generation and handling
- Supports bulk payload transport and bulk register access
- Supports PRBS, Static0 and Static1 test modes
- Supports clock pause and clock stop operation
- Supports various kind of interrupts
- Supports multi-lane payload transport
- Supports various kind of payload positioning w.r.t Block per port and Block per channel
- Supports various kind of flow controlled payload transport
- Supports various kind of resets
- Bus-Reset
- ClockStopMode1 Reset
- LostSync Reset
- Register Reset
- Supports various kind of Master and Slave errors generation and detection
- Parity errors
- CRC errors
- Dynamic Sync bit errors
- Static sync bit errors
- Slave responding when address not assigned
- Master startup using wrong shape
- Bus clash error
- PRBS pattern error
- Testmode Static 0 error
- Testmode Static 1 error
- Benefits
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- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- MIPI SOUNDWIRE Synthesizable Transactor Env
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SmartDV's MIPI SoundWire Synthesizable Transactor env contains following:
- Synthesizable transactors
- Complete regression suite containing all the MIPI SoundWire testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and functions used in verification env
- Documentation also contains User's Guide and Release notes
