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HDMI 1.4/2.0/2.1 Synthesizable Transactor

HDMI 1.4/2.0/2.1 Synthesizable Transactor

HDMI Synthesizable Transactor provides a smart way to verify the HDMI Specification version 1.4b, 2.0b and 2.1 component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's HDMI Synthesizable Transactor is fully compliant with standard HDMI Specification version 1.4b, 2.0b and 2.1 and provides the following features.

Features
  • Protocol Checker fully compliant with HDMI Specification 1.4b,2.0b and 2.1 compliant.
  • Full HDMI source and sink device functionality
  • Supports Video data coding.
  • Supports TERC4 coding and Control period codings.
  • Supports three operating modes given below,
    • Video period
    • Data Island period
    • Control period
  • Supports Display Data Channel(DDC)
  • Supports Variable Refresh Rate (VRR) and Fast Vactive (FVA)
  • Compressed Video Transport VESA DSC 1.2a
  • Supports Fixed Rate Link (FRL) transmission with below features,
    • FRL Character Error Detection
    • FRL Content Protection
    • Forward Error Correction (FEC)
    • 16b18b coding
  • Supports 3D, 4Kx2K, 5Kx2K, 8Kx4K, 10Kx4K Resolution and Expanded Color Spaces.
  • Supports Audio Return Channel (ARC).
  • Supports Enhanced Audio Return Channel (eARC).
  • Supports all packet formats in HDMI Specification 1.4b and 2.0 and 2.1 compliant
  • Supports data island error correction (ECC).
  • Supports on the fly generation of data.
  • Supports 340 Mcsc to 600 Mcsc TMDS Character Rate.
  • Supports FRL Lane link rates of 3 Gbps, 6 Gbps, 8 Gbps, 10 Gbps, and 12 Gbps.
  • Supports High-bandwidth Digital Content Protection System version1.4 (HDCP v1.4)
  • Supports High-bandwidth Digital Content Protection System version2.2 (HDCP v2.2)
    • Supports for HDCP2.2 with full authentication.
    • Supports for HDCP2.2 with bypass the authentication.
  • Supports High-bandwidth Digital Content Protection System version2.3 (HDCP v2.3)
  • Supports Consumer Electronics Control (CEC2.0)
  • Supports HDMI Ethernet and Audio Return Channel (HEAC)
  • Supports CEA-861-F/CTA-861-G standards
  • Detects and reports the following errors.
    • Invalid control character
    • Invalid data character
    • Invalid 10bit code
    • Sync errors
    • ECC errors
    • Invalid packing injection and detection
  • Supports HDMI Type B Connector Dual-Link Architecture
  • Compatible with DVI 1.0(Digital visual interface) single-link and dual-link architecture.
  • Supports ID Communications Channel (IDCC) protocol that works over DDC and enables communication between a Source and a Cable in HDMI 2.1
  • Supports Sink Capabilities Data Structure (SCDS) feature and EDID Extensible Override DB (EEODB) feature in HDMI 2.1
  • Supports Power for Cable Assemblies (PCA) feature in HDMI 2.1
  • HDMI SimXL comes with complete testsuite to test every feature of HDMI specification.
Benefits
  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms
HDMI Synthesizable Transactor Env

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    SmartDV's HDMI Synthesizable Transactor env contains following:

  • Synthesizable transactors
  • Complete regression suite containing all the HDMI testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

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