AMBA AHB Synthesizable Transactor provides a smart way to verify the AMBA AHB component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's AMBA AHB Synthesizable Transactor is fully compliant with standard AMBA 2 AHB, AMBA 3 AHB-Lite and AMBA 5 AHB Specifications and provides the following features
- Features
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- Compliant with ARM AMBA 2 AHB, AMBA 3 AHB-Lite and AMBA 5 AHB specifications
- Supports ARM11 extension
- Supports AHB, AHB-Lite and AHB5 operation
- Supports AHB Master, AHB Slave
- Supports multiple masters and slaves
- Supports ARM AMBA AHB data widths and address widths
- Supports protocol transfer types, burst transfers and response types
- Supports all transfer sizes
- Slave supports fine grain control of response per address or per transaction
- Master supports fine grain control of busy state insertion and master aborting
- Supports early burst termination and locked transfers
- Supports split and retry transfers
- Supports continue or cancel of a transfer on error response
- Supports programmable wait states or delay insertion
- Ability to inject errors during data transfer
- Supports programmable timeout insertion
- Supports flexibility to send completely configured data
- Supports FIFO memory
- Supports on-the-fly protocol and data checking
- AHB-Lite support
- Transfer type changes during wait states
- Address changes during wait states
- Burst termination after a BUSY transfer
- Early burst termination
- AHB5 support
- Extended memory types
- Secure transfers
- Endian
- Stable between clock
- Exclusive Transfers
- Multi-Copy Atomicity
- Locked transfers
- Multiple slave select
- Single-copy atomicity size
- User signaling
- Benefits
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- Compatible with testbench writing using SmartDV's VIP
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- AMBA AHB Synthesizable Transactor Env
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SmartDV's AMBA AHB Synthesizable env contains following:
- Synthesizable transactors
- Complete regression suite containing all the AMBA AHB testcases
- Examples showing how to connect various components, and usage of Synthesizable Transactor
- Detailed documentation of all DPI, class, task and functions used in verification env
- Documentation contains User's Guide and Release notes
