Serial PCRAM Memory Model provides an smart way to verify the Serial PCRAM component of a SOC or a ASIC. The SmartDV's Serial PCRAM memory model is fully compliant with standard Serial PCRAM Specification and provides the following features. Better than Denali Memory Models.
Serial PCRAM Memory Model is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
Serial PCRAM Memory Model comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
- Features
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- Supports Serial PCRAM memory devices from all leading vendors.
- Supports 100% of Serial PCRAM protocol standard.
- Supports all the Serial PCRAM commands as per the specs.
- Supports Serial peripheral interface (SPI).
- Supports the following maximum clock frequencies
- Supports the following SPI protocol modes
- Legacy SPI
- Quad I/O mode
- Dual I/O mode
- Supports Quad I/O frequency of 50 MHz, resulting in an equivalent clock frequency up to 200 MHz.
- Supports Dual I/O frequency of 66 MHz, resulting in an equivalent clock frequency up to 132 MHz.
- Supports the following Continuous Reads and write for entire memory read and write
- Quad and dual output fast read
- Quad and dual input fast program
- Supports Uniform 128Kb sectors (Flash emulation).
- Supports 128Kb sectors Erase (emulated)
- Supports the following Write operations
- Legacy Flash Page Program
- Bit-alterable page writes
- Page Program on all 1s (Preset Writes)
- Supports Write protections for program and erase.
- Supports JEDEC-standard two-byte signature (DA18h).
- Supports 128MB density with SOIC16 package.
- Supports More than 1,000,000 Write cycles.
- Supports Bit-alterable Write operation.
- Constantly monitors Serial PCRAM behavior during simulation.
- Protocol checker fully compliant with Serial PCRAM Specification.
- Models, detects and notifies the test bench of significant events such as transactions, warnings, timings and protocol violations.
- Built in functional coverage analysis.
- Supports Callbacks, so that user can access the data observed by monitor.
- Benefits
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- Faster testbench development and more complete verification of Serial PCRAM designs.
- Easy to use command interface simplifies monitor control and configuration.
- Simplifies results analysis.
- Runs in every major simulation environment.
- Serial PCRAM Verification Env
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SmartDV's Serial PCRAM Verification env contains following.
- Complete regression suite containing all the Serial PCRAM testcases.
- Examples showing how to connect and usage of Model.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation also contains User's Guide and Release notes.
