AC'97 CONTROLLER interface provides full support for the AC'97 CONTROLLER synchronous serial interface, compatible with AC'97 2.2 specification. Through its AC'97 CONTROLLER compatibility, it provides a simple interface to a wide range of low-cost devices. AC'97 CONTROLLER IIP is proven in FPGA environment. The host interface of the AC'97 CONTROLLER can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.
AC97 Controller IIP is supported natively in Verilog and VHDL
- Features
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- Compliant with AC'97 2.2 specification
- Supports AC'97 audio codec functionality
- Supports variable and fixed sample rate support
- Supports 16, 18 and 20 bit sample size support
- Supports 6 output channel surround sound
- Supports stereo input channel
- Supports mono microphone channel
- Supports external DMA engine
- Fully synthesizable
- Static synchronous design
- Positive edge clocking and no internal tri-states
- Scan test ready
- Simple interface allows easy connection to microprocessor/microcontroller devices
- Benefits
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- Single site license option is provided to companies designing in a single site.
- Multi sites license option is provided to companies designing in multiple sites.
- Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
- Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.
- Deliverables
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SmartDV's AC'97 CONTROLLER IP contains following
- The AC'97 CONTROLLER is available in Source and netlist products.
- The Source product is delivered in plain text verilog.If needed VHDL,SystemC code can also be provided.
- Easy to use Verilog Test Environment with Verilog Testcases
- Lint, CDC, Synthesis, Simulation Scripts with waiver files
- IP-XACT RDL generated address map
- Firmware code and Linux driver package
- Documentation contains User's Guide and Release notes.
